The rapid acceptance of low-density parity-check (i.e., LDPC) codes in conventional applications that specify error control coding is due to a capacity of the LDPC codes to approach theoretical performance limits. The LDPC codes are notably used in storage systems, such as magnetic recordings and flash memories. The LDPC codes perform well under iterative decoding techniques that are based on belief propagation. However, the LDPC codes experience an error-floor phenomenon due to the presence of loopy topologies in graphical representations known as trapping sets. The error-floor phenomenon makes the LDPC codes troublesome to use in applications where very low error rates are specified.
It would be desirable to implement a method and/or architecture for mitigation of an error correction failure due to trapping sets.